• 专利附录
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    • 专利摘要:
    The processing unit causes the light source unit to emit modulated light in one or more emission periods in a plurality of charge transfer cycles Cy within a frame period Tf from connection of an accumulation region to a reset potential until the next connection of the accumulation region to the reset potential by controlling a reset switch, and increases the number The processing unit accumulates the charge generated in the photosensitive region into the accumulation region by controlling the voltage applied to the transfer electrode in one or more transfer periods, which is synchronized with one or more emission periods. The processing unit determines, from a sensor unit, a plurality of readings corresponding to a charge amount accumulated in the accumulation region at another point with the plurality of charge transfer cycles Cy in a plurality of read cycles corresponding to each of the plurality of charge transfer cycles Cy. The processing unit calculates a distance based on the plurality of detected readings.
    公开号:CH712465B1
    申请号:CH01201/17
    申请日:2016-04-08
    公开日:2018-09-28
    发明作者:Mase C/O Hamamatsu Photonics K K Mitsuhito；Hiramitsu C/O Hamamatsu Photonics K K Jun；Shimada C/O Hamamatsu Photonics K K Akihiro
    申请人:Hamamatsu Photonics Kk；
    IPC主号:
    专利说明:

    description
    Technical Field The present invention relates to a distance measuring device.
    Background Known time-of-flight (TOR) methods measure a distance from an object to an area sensor by emitting pulsed light from a light source and receiving reflected light from the object through the distance sensor.
    Patent Literature 1 describes a distance measuring device based on the TOF method. The apparatus described in Patent Literature 1 has a configuration for expanding the effective dynamic range of the distance sensor. This device emits pulsed light from a light source and accumulates charges generated on a photodiode of the proximity sensor in a capacitor. When a voltage generated in the capacitor reaches a saturation voltage, the device described above resets the voltage and calculates the distance based on the number of times of reset and the final voltage generated in the capacitor.
    quotes list
    Patent Literature [0004] Patent Literature 1: Japanese Unexamined Patent Publication No. 2006-523,074
    Summary of the invention
    Technical Problem An object of one aspect of the present invention is to provide a distance measuring apparatus capable of expanding a dynamic range of intensity of reflected light.
    Problem Solution One aspect of the present invention is a distance measuring apparatus configured to detect a distance to an object by a time-of-flight method, the apparatus including a light source unit configured to emit modulated light, a sensor unit, and a processing unit.
    The sensor unit includes a photosensitive region configured to generate a charge in accordance with incident light, an accumulation region configured to accumulate the charge generated in the photosensitive region; a transfer electrode provided between the photosensitive region and the accumulation region and a reset switch provided between the accumulation region and a reset potential. The processing unit calculates the distance by controlling an emission timing of the modulated light and controlling the sensor unit. The processing unit causes the light source unit to emit modulated light in one or more emission periods in a plurality of charge transfer cycles within one frame period from the connection of the accumulation region to the reset potential until the next connection of the accumulation region to the reset potential by controlling the reset switch, and increases the number of emission periods per charge transfer cycle within a frame period. The processing unit accumulates the charge generated in the photosensitive region in the accumulation region by controlling a voltage applied to the transfer electrode in one or more transfer periods, which is synchronized with the one or more emission periods. The processing unit determines from the sensor unit a plurality of readings corresponding to an amount of charge accumulated in the accumulating region at another point, wherein the plurality of charge transfer cycles in each of a plurality of read cycles correspond to each of the plurality of charge transfer cycles. The processing unit calculates the distance based on a plurality of read values.
    In the distance measuring apparatus according to one aspect of the present invention, the processing unit increases the number of emission periods per charge transfer cycle within one frame period. That is, the number of emission periods per charge transfer cycle at the start time of one frame period is small, and the number of emission periods per charge transfer cycle is larger in the later course of the one frame period. Therefore, even in a case where the intensity of the reflected light incident on the distance measuring device is high (for example, in a case where the object is located at a short distance or the reflectance of the object is high), it is unlikely to saturate the accumulated signal charges at the beginning of a frame period. Therefore, even in the case described above, the distance measuring device performs an appropriate distance measurement. Even in a case where the intensity of the reflected light incident on the distance measuring device is low (for example, in a case where the object is located at a long distance or when the reflectance of the object is low), a shortage of accumulated signal charges becomes reduced. Therefore, even in the case described above, the distance measuring device makes adequate distance measurements.
    As a result, in the distance measuring apparatus according to the one aspect, it is possible to expand the dynamic range of the intensity of the reflected light without changing a frame period.
    The processing unit may increase the number of emission periods per charge transfer cycle by reducing one cycle of the emission period. In addition, the processing unit may increase the number of emission periods per charge transfer cycle by increasing a period of the charge transfer cycle. The processing unit may increase in stages the number of emission periods per charge transfer cycle. In addition, the processing unit may gradually increase the number of emission periods per charge transfer cycle.
    The sensor unit may include a first accumulating region and a second accumulating region as the accumulating region. The sensor unit may include as the transfer electrode a first transfer electrode provided between the photosensitive region and the first accumulation region and a second transfer period provided between the photosensitive region and the second accumulation region. The sensor unit may include as a reset switch a first reset switch provided between the first accumulation region and the reset potential and a second reset switch provided between the second accumulation region and the reset potential. In which cases the processing unit accumulates the charge generated in the photosensitive region into the first accumulation region by controlling a voltage applied to the first transfer electrode in one or more first transfer periods, which are synchronized with the one or more emission periods, and accumulates those in the photosensitive one Region generated charge into the second accumulation region by controlling a voltage applied to the second transfer electrode in one or more second transfer periods phase-shifted with respect to the one or more first transfer periods in a plurality of charge transfer cycles within the frame period from connecting the first accumulation region and the second accumulation region until to the reset potential, the next connection of the first accumulation region and the second accumulation region to the reset potential by controlling the first reset switch and the second reset switch age. The processing unit obtains from the sensor unit a plurality of first read values corresponding to the amount of charge accumulated in the first accumulation region at another point, the plurality of charge transfer cycles and a plurality of second read values corresponding to the amount of charge accumulated in the second accumulation region at the point in each of the plurality of read cycles corresponding to each of the plurality of charge transfer cycles. The processing unit calculates the distance based on the plurality of first read values and the plurality of second read values.
    The processing unit may compare a sum of the first read value of the n-th read cycle and a difference value between the first read value of the n-th read cycle and the first read value of the n-1-th read cycle with a predetermined threshold or may be a sum of the second Read values of the n-th read cycle and a difference value between the second read value of the n-th read cycle and the second read value of the (n-1) -th cycle with the predetermined threshold and if any of the sums exceeds the predetermined threshold value, the processing unit can Stop reading cycle of the (n + 1) th and subsequent read cycles. In which case, using the predetermined threshold value, the first read value and the second read value, which are detected before saturation of the first accumulation region and the second accumulation region, are used for distance measurement. Therefore, the dynamic range of the intensity of the reflected light is reliably expanded. Further, when the above-described sum exceeds the predetermined threshold value, the detection of the reading value from the sensor unit is stopped, making it possible to start the calculation of the distance in an early stage. It should be noted that "n" indicates the order of the plurality of read cycles.
    The processing unit may calculate a first estimate using an approximate expression based on the plurality of first readings, and calculate a second estimate using an approximate expression based on the plurality of second readings, and may calculate the distance based on the first estimated Calculate the value and the second estimated value. In which case, each of the first estimated value and the second estimated value used to calculate the distance are each calculated using such an approximate expression based on the first read values and a second read based approximate expression determined prior to the last read cycle become. Therefore, even if a part of the first read values and the second read values detected in the plurality of read cycles fluctuates due to trouble or the like, the influence of the read value containing the fluctuation becomes in the first estimated value and the second estimated value reduced. As a result, the distance measuring accuracy is improved.
    Advantageous Effects of Invention According to one aspect of the present invention, there is provided a distance measuring apparatus capable of expanding the dynamic range of the intensity of reflected light.
    Brief description of the drawings [0015]
    Fig. 1 is a diagram schematically illustrating a distance measuring device according to an embodiment.
    Fig. 2 is a diagram schematically illustrating an exemplary sensor.
    Fig. 3 is a plan view illustrating an exemplary pixel unit in the sensor.
    FIG. 4 is a diagram illustrating a sectional configuration along the line IV-IV in FIG. 3. FIG.
    FIG. 5 is a diagram illustrating a sectional configuration along the line V-V in FIG. 3. FIG.
    Fig. 6 is a circuit diagram of a pixel unit of the sensor unit and a sample and hold circuit corresponding to the pixel unit.
    Fig. 7 is a flowchart illustrating control and calculation of a processing unit.
    Fig. 8 is a timing chart of various signals used in the distance measuring apparatus.
    Fig. 9 is a timing chart of various signals used in the distance measuring apparatus.
    Fig. 10 is a timing chart of various signals used in the distance measuring apparatus.
    Fig. 11 is a timing chart of various signals used in the distance measuring apparatus.
    Fig. 12 is a timing chart of various signals used in the distance measuring apparatus.
    Fig. 13 is a timing chart of various signals used in the distance measuring apparatus.
    Fig. 14 is a timing chart of various signals used in the distance measuring apparatus.
    Fig. 15 is a diagram schematically illustrating an exemplary sensor according to another embodiment.
    Fig. 16 is a circuit diagram of a pixel unit of a sensor unit according to the other embodiment and a sample and hold circuit corresponding to the pixel unit.
    DESCRIPTION OF EMBODIMENTS Embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the description, the same reference numerals are used for the same elements or elements having the same functions, and redundant explanations are omitted.
    Fig. 1 is a diagram schematically illustrating a distance measuring device according to the present embodiment. A distance measuring device 10 illustrated in FIG. 1 detects a distance between an object and the distance measuring device 10 by a time-of-flight method (TOF). The distance measuring device 10 includes a light source unit 12, a sensor unit 14, and a processing unit 16.
    The light source unit 12 emits modulated light. In the present embodiment, the light source unit 12 may include a laser diode 12a, a reflector element 12b and a driver circuit 12c. The driver circuit 12c supplies the modulation current synchronized with the drive pulse signal from the processing unit 16 to the laser diode 12a. The laser diode 12a emits modulated light in accordance with the modulation current. The modulated light may be, for example, one or more pulsed light beams. The laser diode 12a emits pulsed light to the reflective element 12b. The reflector element 12b reflects the pulsed light output from the laser diode 12a. The pulsed light reflected at the reflector element 12b is directed to the object.
    The drive circuit 12c sends a drive signal to an actuator of the reflector element 12b under the control of the processing unit 16. The drive circuit 12c drives the actuator in such a manner that the optical path of the pulsed light emitted from the laser diode 12a is toward the reflector element 12b changes. The actuator deflects the angle of the reflector element 12b from the drive circuit 12c by the drive signal. The deflection of the angle of the reflector element 12b results in a scanning of the irradiation position of the pulsed light emitted from the laser diode 12a toward an object. The reflector element 12b is, for example, a microelectromechanical system (MEMS) mirror.
    In the present embodiment, the sensor unit includes my sensor 18, a digital-to-analog converter (DAC) 20, and an analog-to-digital converter (ADC) 22. The digital-to-analog converter 20 converts a digital signal from the signal processing unit 16a the processing unit 16 into an analog signal. The digital-to-analog converter 20 supplies the analog signal to the sensor 18. The analog-to-digital converter 22 converts an analog signal from the sensor 18 into a digital signal. The analog-to-digital converter 22 supplies the digital signal to the processing unit 16.
    The processing unit 16 calculates the distance by controlling the emission timing of the modulated light of the light source unit 12 and controlling the sensor unit 14. The processing unit 16 includes a signal processing unit 16a and a memory 16b. The signal processing unit 16a is an arithmetic circuit such as a field programmable gate array (FPGA). The memory 16 is, for example, a static random access memory (SRAM).
    Fig. 2 is a diagram schematically illustrating an exemplary sensor. The sensor 18 includes an imaging region IR, a sample-and-hold circuit group SHG, a switch group SWG, a horizontal switch register group HSG, signal lines H1 and H2, and output amplifiers OAP1 and OAP2. For example, as illustrated in FIG. 2, the sensor 18 is a line sensor that obtains an image of a line. In the present embodiment, the imaging region IR includes a plurality of pixel units P (j) arranged in the horizontal direction. It should be noted that J is an integer from 1 to J. J is an integer of 2 or more and indicates the number of pixel units.
    Fig. 3 is a plan view illustrating an exemplary pixel unit in the sensor. FIG. 4 is a view illustrating a sectional configuration taken along the line IV - IV in FIG. 3, and FIG. 5 is a view illustrating a sectional configuration taken along the line VV in FIG. 3 , Each of the pixel units P (1) to P (J) has the configuration illustrated in FIGS. 3 to 5.
    As illustrated in FIGS. 4 and 5, the pixel unit P (j) in the present embodiment includes a semiconductor substrate SB. The semiconductor substrate SB is, for example, a silicon substrate. The semiconductor substrate SB includes a first semiconductor region SR1 and a second semiconductor region SR2. The first semiconductor region SR1 is a p-type semiconductor region that provides a main surface SBF1 of the semiconductor substrate SB. The second semiconductor region SR2 is a p-type semiconductor region disposed on the first semiconductor region SR1. The impurity concentration of the second semiconductor region SR2 is equal to or lower than the impurity concentration of the first semiconductor region SR1. The semiconductor substrate SB is formed by, for example, depositing the p-type semiconductor region on a p-type semiconductor substrate by an epitaxial growth method.
    An insulating film ISL is formed on the other main surface SBF2 of the semiconductor substrate SB. The insulating film ISL is made of, for example, SiO 2. A photo-electrode PG is disposed on the insulating film ISL. The photo-gate electrode PG is made of polysilicon, for example. As illustrated in FIG. 3, the photo-gate electrode PG may be formed into a substantially rectangular planar shape in the present embodiment. In the pixel unit P (j), a region located below the photo-gate electrode PG functions as a photosensitive region that generates a charge in response to incident light.
    As illustrated in Figs. 4 and 5, a first transfer electrode TX1, a second transfer electrode TX2, and a third transfer electrode TX3 are disposed on the insulating film ISL. The transfer electrodes TX1 to TX3 are made of polysilicon, for example. As illustrated in FIGS. 3 to 5, the first transfer electrode TX1 and the second transfer electrode TX2 are arranged in such a manner that the photo gate electrode PG is provided therebetween.
    In the present embodiment, four third transfer electrodes TX3 are arranged on the insulating film ISL as illustrated in FIG. The two third transmission electrodes TX3 are arranged in such a manner that the first transmission electrode TX1 is located between the two third transmission electrodes TX3 in a direction (hereinafter referred to as "Y direction") which intersects the direction in which the first transmission electrodes TX1 and the second transfer electrodes TX2 are arranged (hereinafter referred to as an "X direction"). The two other third transfer electrodes TX3 are arranged in such a manner that the second transfer electrode TX2 is located between the other two third transfer electrodes TX3 in the Y direction.
    As illustrated in FIG. 4, a first accumulation region fd1 and a second accumulation region fd2 are formed in the second semiconductor region SR2. The first accumulation region fd1 and the second accumulation region fd2 accumulate the charge transferred from the photosensitive region. The first accumulating region fd1 and the second accumulating region fd2 are arranged in such a manner that the photosensitive region is located between the first accumulating region fd 1 and the second accumulating region fd2. The first accumulating region fd 1 and the second accumulating region fd2 are, for example, n + -type semiconductor regions doped with an n-type impurity at a high concentration.
    The insulating film ISL defines an opening over the first accumulating region fd1 and the second accumulating region fd2. An electrode 13 is disposed in these openings. The electrode 13 is made of tungsten, which is provided over a Ti / TiN film, for example.
    In the X direction, the first transfer electrode TX1 is disposed between the electrode 13 on the first accumulation region fd1 and the photo gate electrode PG. When the charge from the photosensitive region is transferred to the first accumulation region fd1, a voltage VTX1 that reduces the potential of the semiconductor region under the first transfer electrode TX1 is applied to the first transfer electrode TX1. The voltage VTX1 is applied from the digital-to-analog converter 20 based on the digital signal from the signal processing unit 16a.
    In the X direction, the second transfer electrode TX2 is disposed between the electrode 13 on the second accumulation region fd2 and the photo gate electrode PG. When the charge is transferred from the photosensitive region to the second accumulation region fd2, a voltage VTX2 which reduces the potential of the semiconductor region under the second transfer electrode TX2 is applied to the second transfer electrode TX2. The voltage VTX2 is applied from the digital-to-analog converter 20 based on the digital signal from the signal processing unit 16a.
    As illustrated in FIG. 5, an n + -type semiconductor region SR3 is formed in the second semiconductor region SR2. In the present embodiment, four semiconductor regions SR3 are arranged. A pair of semiconductor regions SR3 is arranged in such a manner that the photosensitive region is located between the one pair of semiconductor regions SR3. The other pair of semiconductor regions SR3 is arranged in such a manner that the photosensitive region is located between the other pair of semiconductor regions SR3.
    The insulating film ISL defines an opening over each of the semiconductor regions SR3. An electrode 13 is disposed in each of these openings. The electrode 13 is made of tungsten, which is provided over a Ti / TiN film, for example.
    In the X direction, the corresponding third transfer electrode TX3 is disposed between the electrode 13 on a semiconductor region S3 and the photo gate electrode PG. Upon application of a voltage VTX3 to the third transfer electrode TX3, the potential of the semiconductor region under the third transfer electrode TX3 is reduced. With reduction of the potential of the semiconductor region under the third transfer electrode TX3, the charge is transferred from the photosensitive region to the semiconductor region SR3. The voltage VTX3 is applied from the digital-to-analog converter 20 based on the digital signal from the signal processing unit 16a.
    The electrode 13 in the semiconductor region SR3 is also connected to a predetermined potential Vdd (see FIG. 6). The potential Vdd is set by the digital-to-analog converter 20 based on the digital signal from the signal processing unit 16a. When the potential of the semiconductor region under the third transfer electrode TX3 is reduced with the application of the voltage VTX3, the charge in the photosensitive region is reset.
    Subsequently, Fig. 6 is referenced together with Fig. 2. Fig. 6 is a circuit diagram of a pixel unit of the sensor unit and a sample and hold circuit corresponding to the pixel unit. As illustrated in FIGS. 2 and 6, the sample and hold circuit group SHG of the sensor 18 includes a number J of first sample and hold circuits SH1 and a number J of second sample and hold circuits SH2. Each of the first sample and hold circuits SH1 and each of the second sample and hold circuits SH2 are connected to the corresponding pixel unit P (j) (corresponding to pixel units of pixel units P (1) to P (J)). That is, the sample and hold circuit group SHG includes the number J of sample and hold circuit pairs SHP (1) to SHP (J), all of which include a first sample and hold circuit SH1 and a second sample and hold circuit SH2. Each of the number J of sample and hold circuit pairs SHP (1) to SHP (J) is associated with each of the pixel units P (1) to P (J), respectively.
    The pixel unit P (j) includes a first reset switch RS1, a second reset switch RS2, and charge voltage conversion circuits A1 and A2. The first reset switch RS1 is located between the reset potential Vr and the electrode 13 on the first accumulation region fd1. The second reset switch RS2 is located between the reset potential Vr and the electrode 13 on the second accumulation region fd2. The reset potential Vr is set by the digital-to-analog converter 20 based on the digital signal from the signal processing unit 16a.
    A reset pulse signal Sres is applied from the signal processing unit 16a to the first reset switch RS1 and the second reset switch RS2. When the reset pulse signal Sres is applied to the first reset switch RS1 and the second reset switch RS2, the first accumulation region fd1 and the second accumulation region fd2 are connected to the reset potential Vr. This operation resets the charge in the first accumulation region fd1 and the charge in the second accumulation region fd2. The period from the time of resetting the charges of the first accumulation region fd1 and the second accumulation region fd2 to the next reset timing is determined by a frame period Tf (see FIG. 8).
    The input of the charge voltage conversion circuit A1 is connected to the electrode 13 on the first accumulation region fd1. The output of the charge voltage conversion circuit A1 is connected to a switch SW10 of the first sample and hold circuit SH1. The charge voltage conversion circuit A1 converts the amount of charge in the first accumulation region fd1 into a voltage, and provides the voltage of the first sample and hold circuit SH1. The input of the charge voltage conversion circuit A2 is connected to the electrode 13 on the second accumulation region fd2. The output of the charge voltage conversion circuit A2 is connected to a switch SW12 of the second sample and hold circuit SH2. The charge voltage conversion circuit A2 converts the charge amount of the second accumulation region fd2 into a voltage and provides the voltage of the second sample and hold circuit SH2.
    The first sample and hold circuit SH1 includes the switch SW10 and a capacitor CP10. The second sample and hold circuit SH2 includes the switch SW12 and a capacitor CP12. A sampling pulse signal Ssamp is applied to the switch SW10 and the switch SW12 from the signal processing unit 16a. When the sampling pulse signal Ssamp is applied to the switch SW10 and the switch SW12, the output of the charge voltage conversion circuit A1 is connected to the capacitor CP10, and the output of the charge voltage conversion circuit A2 is connected to the capacitor CP2. With this configuration, the output voltage of the charge voltage conversion circuit A1 is held across the capacitor CP10, and the output voltage of the charge voltage conversion circuit A2 is held on the capacitor CP12. The period from the application of the sampling pulse signal Ssamp to the next application of the sampling pulse signal Ssamp, that is, the interval between two consecutive sampling pulse signals Ssamp is determined as the reading period.
    The switch group SWG of the sensor 18 includes the number J of switches SW1 and the number J of switches SW2. Each of the switches SW1 and each of the switches SW2 are connected to the capacitor CP10 of the first sample and hold circuit SH1 for the corresponding pixel unit from the pixel units P (1) to P (J) and to the capacitor CP12 of the second sample and hold circuit SH2 connected. That is, the switch group SWG includes the number J of switching pairs SWP (1) to SWP (J), all of which include a switch SW1 and a switch SW2. Each of the number J of switching pairs SWP (1) to SWP (J) is associated with each of the sample and hold circuit pairs SHP (1) to SHP (J), respectively.
    A read pulse signal Sread is applied to the switch SW1 and the switch SW2. The read pulse signal Sread is supplied from the horizontal shift register group HSG. The horizontal shift register group HSG includes the number J of horizontal shift registers. The horizontal shift registers include a flip-flop. This horizontal shift register is arranged in an arrangement direction of the pixel units P (1) to P (J). A start signal from the signal processing unit 16a is applied to the horizontal shift register located at one end of the horizontal shift register group HSG. A clock signal is applied from the signal processing unit 16a to all the horizontal shift registers. In response to the start signal and the clock signal, each of the number J of horizontal shift registers sequentially applies the read pulse signal Sread to each of the switching pairs SWP (1) to SWP (J). By applying this read pulse signal Sread in this manner, the first sample and hold circuit SH1 and the second sample and hold circuit SH2 of the sample and hold circuit pairs SHP (1) to SHP (J) are sequentially connected to both the signal line H1 and the signal line H2 ,
    When the read pulse signal Sread is applied to the switches SW1 and SW2, both the capacitor CP10 of the first sample and hold circuit SH1 and the capacitor CP12 of the second sample and hold circuit SH2 are respectively connected to each of the signal lines H1 and the signal lines H2 connected. In this configuration, the voltage held in the first sample and hold circuit SH1 is input through the signal line H1 to the output amplifier OAP1. The voltage held in the second sample and hold circuit SH2 is input to the output amplifier OAP2 via the signal line H2. Both the output amplifier OAP1 and the output amplifier OAP2 amplify the input voltage and output the amplified voltage to the analog-to-digital converter 22.
    The analog-to-digital converter 22 converts the input voltage signal into a digital value having a value corresponding to the magnitude of the voltage signal. The digital value output by the analog-to-digital converter 22 is stored in the memory 16b of the processing unit 16. In the present embodiment, the digital value is based on the voltage signal from the output amplifier OAP1 and is stored in the memory 16b as a first read value to be described below. The greater the amount of charge accumulated in the first accumulation region fd1, the smaller the first reading. The digital value is based on the voltage signal from the output amplifier OAP2, stored in memory 16b as a second read value to be described below. The larger the amount of charge accumulated in the second accumulation region fd2, the smaller the second reading.
    Next, control and calculation of the processing unit 16 will be described. Fig. 7 is a flowchart illustrating control and calculation operations of the processing unit. Figs. 8 and 9 are timing charts of various signals used in the distance measuring apparatus. The processing unit 16 performs control and calculation described below for each of the pixel units with reference to FIGS. 7 to 9.
    In the present embodiment, the processing unit 16 initially determines from the sensor unit 14 the number N of first read values D1 (0,..., N) and the number N of second read values D2 (0,. Emission frame period during which the modulated light is not emitted from the light source unit 12 (S11 in Fig. 7).
    Specifically, the signal processing unit 16a applies the sampling pulse signal Ssamp to the switch SW10 and the switch SW12 before the start of the first-time charge transfer cycle. In this operation, the voltage corresponding to the amount of charge accumulated in the first accumulation region fd1 at a point before the first charge transfer cycle is held in the first sample and hold circuit SH1. Moreover, the voltage corresponding to the amount of charge accumulated in the second accumulation region fd2 at the above-described point before the first charge transfer cycle is held in the second sample and hold circuit SH2.
    Subsequently, the signal processing unit 16a sends out a start signal and a clock signal to the horizontal shift register group HSG in such a manner that the read pulse signal Sread is applied from the horizontal shift register to the switches SW1 and SW2. In this operation, the processing unit 16 determines the first reading D1 (0) and the second reading D2 (0) from the sensor unit 14.
    Subsequently, the signal processing unit 16a executes the first to nth charge transfer cycles and the first to nth read cycles as described below. It should be noted that N is a numerical value representing the
    Indicates the order of magnitude of the predetermined maximum charge transfer cycle. Subsequently, the symbol "n" is used as an index indicating the order of the read cycles.
    The signal processing unit 16a applies a digital signal to the sensor unit 14 in such a manner that the high level voltage signal VTX1 is applied to the first transfer electrode TX1 during a first transfer period T1 of the nth charge transfer cycle. In this operation, the potential of the semiconductor region below the first transfer electrode TX1, that is, the potential of the semiconductor region between the photosensitive region and the first accumulation region fd 1 in the first transfer period T1 decreases, and thus charge is transferred from the photosensitive region to the first accumulation region fd1 , The signal processing unit 16a applies a digital signal to the sensor unit 14 in such a manner that the high level voltage signal VTX2 is applied to the second transfer electrode TX2 within the second transfer period T2 of the nth charge transfer cycle. In this operation, the potential of the semiconductor region under the second transfer electrode TX2, that is, the potential of the semiconductor region between the photosensitive region and the accumulation region fd2 in the second transfer period T2 decreases, and thus charge is transferred from the photosensitive region to the second accumulation region fd2.
    The first transmission period T1 and the second transmission period T2 in the non-emission frame time period are set similarly to the first transmission period T1 and the second transmission period T2 of the light emission frame period to be described below. The total length of the first transmission period T1 in each of the charge transfer cycles in the non-emission frame period is the same as the total length of the first transfer period T1 in each of the charge transfer cycles of the light emission frame period. The total length of the second transmission period T2 in each of the charge transfer cycles in the non-emission frame period is the same as the total length of the second transfer period T2 in each of the charge transfer cycles in the light emission frame period.
    In the present embodiment, the signal processing unit 16a applies a digital signal to the sensor unit 14 in such a manner that the low voltage signal VTX3 is applied to the third transfer electrode TX3 during the first transfer period T1 and the second transfer period T2. Therefore, the potential of the semiconductor region between the photosensitive region and the semiconductor region SR3 is maintained at a high level during the first transfer period T1 and the second transfer period T2, and thus the charge generated in the photosensitive region is not transferred to the semiconductor region SR3. In contrast, the high-level voltage signal VTX3 is applied to the third transfer electrode TX3 during a period other than the first transfer period T1 and the second transfer period T2. Therefore, the charge generated in the photosensitive region is transferred to the semiconductor region SR3 and removed during the period other than the first transfer period T1 and the second transfer period T2.
    Subsequently, the signal processing unit 16a applies the sampling pulse signal Ssamp to the switch SW10 and the switch SW12 at a point between the end point of the nth charge transfer cycle and the start point of the (n + 1) th charge transfer cycle. In this operation, the voltage corresponding to the amount of charge accumulated in the first accumulation region fd1 at another point with the plurality of charge transfer cycles is held in the first sample and hold circuit SH1, and the voltage corresponding to the amount of charge accumulated in the second accumulation region fd2 at a point becomes .theta the second sample and hold circuit SH2 held. Subsequently, the signal processing unit 16a applies the start signal and the clock signal to the horizontal shift register group HSG in the n-th read cycle in such a manner that the read pulse signal Sread from the horizontal shift register is applied to the switches SW1 and SW2. In this operation, the processing unit 16 determines the first reading D1 (n) and the second reading D2 (n) from the sensor unit 14.
    The processing unit 16 determines the first reading D1 (0, ..., N) and the second reading D2 (0, ..., N) from the sensor unit 14 and stores the readings in the memory 16b. In the charge transfer cycle in the non-emission frame period, the processing unit 16 does not allow the light source unit 12 to emit modulated light. Therefore, the first reading D1 (0, ..., N) and the second reading D2 (0, ..., N) detected in the non-emission frame period reflect only a noise component such as a backlight. Both the first read value D1 (0, ..., N) and the second read value D2 (1, ..., N) are respectively output from each of a first read value Q1, (0, ..., N) and a second read value Reads Q2 (1, ..., N) obtained after the light emission frame period are subtracted to remove the noise component such as a backlight.
    Subsequently, the signal processing unit 16a of the processing unit 16 applies the reset pulse signal Sres to the first reset switch RS1 and the second reset switch RS2, and connects the first accumulation region fd1 and the second accumulation region fd2 to the reset potential Vr. In this operation, the charge accumulated in the first accumulation region fd1 and the charge accumulated in the second accumulation region fd2 are reset (S12 in Fig. 7), and then the light emission frame period is started as the next frame period Tf. In the charge transfer cycle in the light emission frame period, a drive pulse signal is applied to the light source unit 12 from the signal processing unit 16a, and the light source unit 12 emits modulated light at a predetermined timing.
    In the light emission frame period, the processing unit 16 obtains the first read value Q1 (0) and the second read value Q2 (0) from the sensor unit 14 and stores both the first read value Q1 (0) and the second one
    Read value Q2 (0) in the memory 16b as an initial value of each of the first read value and the second read value (S13 in FIG. 7).
    Specifically, the signal processing unit 16a applies the sampling pulse signal Ssamp to the switch SW10 and the switch SW12 before the start of the first charge transfer cycle Cy. In this operation, the voltage corresponding to the amount of charge accumulated in the first accumulation region fd 1 at a point before the first charge transfer cycle is held in the first sample and hold circuit SH1, and the voltage corresponding to the amount of charge accumulated in the second accumulation region fd2 at the point is determined second sample and hold circuit SH2 held.
    Subsequently, the signal processing unit 16a sends a start signal and a clock signal to the horizontal shift register group HSG in such a manner that the read pulse signal Sread is applied from the horizontal shift register to the switches SW1 and SW2. In this operation, the processing unit 16 determines the first read value Q1 (0) and the second read value Q2 (0) from the sensor unit 14. That is, the charge accumulated in the nth charge transfer cycle Cy in the read cycle between the end point of the n- charge transfer cycle Cy and the start point of the (n + 1) th charge transfer cycle Cy.
    Each of the first read value Q1 (0) and the second read value Q2 (0) corresponds to the amount of charge accumulated in the first accumulation region fd1 and the accumulated amount of charge in the second accumulation region fd2 at the origin of the initial strobe signal Ssamp, that is, at one point the first charge transfer cycle. Therefore, the first read value Q1 (0) and the second read value Q2 (0) do not reflect the signal light component generated by the reflection of the modulated light from the light source unit 12 from the object.
    Subsequently, the signal processing unit 16a sets n to 1 (S14 in Fig. 7) and tries to compare the first through nth charge transfer cycles Cy and the first through nth read cycles, as described below. The read period (period between two consecutive strobe signals Ssamp) includes the charge transfer cycle Cy and the read cycle.
    First, as illustrated in FIG. 8, the signal processing unit 16a applies one or more drive pulse signals SL to the light source unit 12 in the nth charge transfer cycle Cy, and allows the light source unit 12 to emit modulated light a number of times, which are the same is like the number of drive pulse signals SL (S15 in Fig. 7). That is, the number m of emission periods of modulated light from the light source unit 12 in the nth charge transfer cycle Cy is one or more. The time length of each of the emission periods is TO, as illustrated in FIG. 9.
    As also illustrated in Fig. 9, the signal processing unit 16a applies a digital signal to the sensor unit 14 in such a manner that the high level voltage signal VTX1 is applied to the first transfer electrode TX1 within the first transfer period T1 of the nth charge transfer cycle Cy. The signal processing unit 16a applies a digital signal to the sensor unit 14 in such a manner that the high level voltage signal VTX2 is applied to the second transfer electrode TX2 within the second transfer period T2 of the nth charge transfer cycle Cy.
    The first transmission period T1 is synchronized with the drive pulse signal SL. That is, the rise time of the drive pulse signal SL and the rise time of the voltage signal VTX1 are substantially synchronized with each other. The duration TO of the drive pulse signal SL and the first transmission period T1 are substantially the same time length.
    The second transmission period T2 is inverted in phase with the first transmission period T1. That is, in each of the charge transfer cycles Cy, the phase of the second transfer period T2 is delayed by 180 degrees from the phase of the first transfer period T1. More specifically, the falling timing of the voltage signal VTX1 and the rising timing of the voltage signal VTX2 are substantially synchronized with each other. The first transmission period T1 and the second transmission period T2 have substantially the same length.
    In the present embodiment, the signal processing unit 16a applies a digital signal to the sensor unit 14 in such a manner that the low-level voltage signal VTX3 is applied to the third transfer electrode TX3 during the first transfer period T1 and the second transfer period T2. The high-level voltage signal VTX3 is applied to the third transfer electrode TX3 during a period other than the first transfer period T1 and the second transfer period T2. Therefore, the charge corresponding to the incident light in the photosensitive region is not transmitted to the semiconductor region SR3 during the first transmission period T1 and the second transmission period T2. However, the charge generated in the photosensitive region is transferred to the semiconductor region SR3 and removed during a period other than the first transfer period T1 and the second transfer period T2.
    As described above, the first transmission period T1 is provided in synchronism with each of the emission periods of the modulated light, and the second transmission period T2 is provided in phase reverse with respect to the first transmission period T1. Therefore, the first transmission period T1 is equal to the number of drive pulse signals SL and the second transmission period T2 is equal to the number of drive pulse signals SL in the nth charge transmission cycle Cy. In the n-th charge transfer cycle Cy, the time length for storing the charge in the first accumulation region fd 1 is the product of the first transfer period T1 (time TO) and the number of drive pulse signals SL (number of emission periods). In the n-th charge transfer cycle Cy, the time length for storing the charge in the second accumulation region fd2 is the product of the second transfer period T2 (time TO) and the number of times the drive pulse signal SL (number of emission periods).
    Subsequently, the signal processing unit 16a obtains the first read value Q1 (n) and the second read value Q2 (n) from the sensor unit 14, and stores the first read value Q1 (n) and the second read value Q2 (n) in the memory 16b (S16 in FIG Fig. 7).
    Specifically, the signal processing unit 16a applies the sampling pulse signal Ssamp to the switch SW10 and the switch SW12 between the end point of the nth charge transfer cycle Cy and the start point of the (n + 1) th charge transfer cycle Cy. In this operation, the voltage corresponding to the amount of charge accumulated in the first accumulation region fd1 at another point with the plurality of charge transfer cycles Cy is held in the first sample and hold circuit SH1, and the voltage corresponding to the amount of charge accumulated in the second accumulation region fd2 at the point becomes held in the second sample and hold circuit SH2.
    Subsequently, the signal processing unit 16a applies the start signal and the clock signal to the horizontal shift register group HSG in the n-th read cycle in such a manner that the read pulse signal Sread from the horizontal shift register is applied to the switches SW1 and SW2. With this operation, the processing unit 16 determines the first read value Q1 (n) and the second read value Q2 (n) from the sensor unit 14. That is, the charge accumulated in the n-th load transfer cycle Cy in the read cycle between the end point of the n- load transfer cycle Cy is read around the start point of the (n + 1) -th load transfer cycle Cy. The first read value Q1 (n) is a value corresponding to the amount of charge accumulated in the first accumulation region fd1 at a point between the end of the n-th charge transfer cycle Cy and the start of the (n + 1) -th charge transfer cycle Cy, and is the second one Read value Q2 (n) is a value corresponding to the amount of charge accumulated in the second accumulation region fd2 at the point.
    Subsequently, the signal processing unit 16a determines a first difference value k1 (n) and a second difference value k2 (n) (S17 in Fig. 7). The first difference value k1 (n) is obtained by subtracting a first read value Q1 (n-1) of the (n-1) -th read cycle from the first read value Q1 (n) of the n-th read cycle. The second difference value k2 (n) is obtained by subtracting a second read value Q2 (n-1) of the (n-1) -th read cycle from the second read value Q2 (n) of the n-th read cycle.
    Subsequently, the signal processing unit 16a obtains a predicted value Q1 (n + 1) and a predicted value Q2 (n + 1) (S18 in Fig. 7). The predicted value Q1 (n + 1) is obtained by adding the first difference value k1 (n) to the first read value Q1 (n) of the n-th read cycle. The predicted value Q2 (n + 1) is obtained by adding the second difference value k2 (n) to the second read value Q2 (n) of the n-th read cycle. The predicted value Q1 (n + 1) is the predicted value of the first read value of the (n + 1) -th read cycle and the predicted value Q2 (n + 1) is the predicted value of the second read value of the (n + 1) -th read cycle ,
    Subsequently, the signal processing unit 16a compares each of the first predicted value Q1 (n + 1) and the second predicted value Q2 (n + 1) with a predetermined threshold value Qth (S19 in Fig. 7). In the present embodiment, the threshold Qth is set equal to or larger than the first reading corresponding to the saturation storage capacity of the first accumulation region fd1, and the threshold Qth becomes equal to or greater than the second reading corresponding to the saturation storage capacity of the second Accumulation region fd2 set. When the first predicted value Q1 (n + 1) is equal to or greater than the threshold value Qth and the second predicted value Q2 (n + 1) is equal to or greater than the threshold value Qth, the determination result of the processing in S19 is "No And then processing of the signal processing unit 16a proceeds to processing in S20. The processing in S20 tests whether n equals N or greater. If n is smaller than N in the processing in S20, the signal processing unit 16a increments the value of n by 1 (S21 in Fig. 7) and repeats the processing from S15. If n is equal to N or greater in the processing in S20, the processing of the signal processing unit 16a proceeds to S22.
    If any one of the first predicted value QI (n + 1) and the second predicted value Q2 (n + 1) exceeds the threshold Qth as a result of the processing (comparison) in S19, the value is smaller than the threshold, the processing of Signal processing unit 16 a to S22 on. Therefore, when either the first predicted value Q1 (n + 1) or the second predicted value Q2 (n + 1) exceeds the threshold Qth, the processing unit 16 stops the (n + 1) th and subsequent read cycles. That is, the signal processing unit 16a stops the detection of the first read value and the second read value from the sensor unit 14 in the (n + 1) th and subsequent read cycles and stores the first read value and the second read value in the (n + 1) and the subsequent read cycles in memory 16b.
    When the threshold value Qth is equal to the larger reading value of the first reading value corresponding to the saturation memory capacity of the first accumulating region fd1 and the second reading value corresponding to the saturation memory capacity of the second accumulating region fd2, the processing unit 16 may set the first reading value Q1 (n) in one Determine range that does not exceed the reading value corresponding to the saturation storage capacity of the first accumulation region fd1, and the processing unit 16 may determine the second read value Q2 (n) in a range not exceeding the reading value corresponding to the saturation storage capacity of the second accumulation region fd2. As a result, the dynamic range of the measured distance can be improved. In addition, the distance measurement accuracy is improved. Furthermore, it is possible to start the calculation of the processing in S22 and subsequent processing of the signal processing unit 16a in an early stage.
    In the present embodiment, the threshold value Qth may be set to a value greater than the value which is the larger of the first reading value corresponding to the saturation storage capacity of the first accumulation region fd 1 and the second reading value corresponding to the saturation storage capacity of the second one Accumulation region fd2. According to this embodiment, it is possible to use the sensor unit 14 within a range of excellent linearity of the relationship between the accumulated charge amount and the amount of incident light in each of the first accumulation region fd1 and the second accumulation region fd2. Therefore, the distance measuring accuracy is further improved. Subsequently, the signal processing unit 16a determines a first estimated value Q1 est and a second estimated value Q2est (S22 in FIG. 7). Specifically, the signal processing unit 16a generates an appropriate expression based on the first read values Q1 (0) to Q1 (n) to the nth read cycle as the last read cycle, and calculates a correction value Qlcorr of the first read value Q1 using the approximate expression. Then, as illustrated in the following expression (1), the signal processing unit 16a calculates the first estimated value Q1est by subtracting the read value D1 (n) from the sum of the correction value Qlcorr of the first read value Q1 and the first read value Q1 (0). <Expression> (1)
    Qlest = Qlcorr + Ql (0) - Dl (n) Similarly, the signal processing unit 16a generates an approximate expression based on the second read values Q2 (0) to Q2 (n) to the nth read cycle as the last read cycle and computes a correction value Q2corr of the second read value Q2 using the approximate expression. Then, as illustrated in a following expression (2), the signal processing unit 16a calculates the second estimate Q2est by subtracting the read value D2 (n) from the sum of the correction value Q2corr of the second read value Q2 and the second read value Q2 (0). <Expression (2)> Q2est = Q2corr + Q2 (0) - D2 (n) In the present embodiment, the correction value Qlcorr of the first read value Q1 is a correction value of the first read value Q1 (n) of the nth read cycle the correction value Q2corr of the second read value Q2 is a correction value of the second read value Q2 (n) of the nth cycle. As long as the correction values Qlcorr and Q2corr are correction values which are determined as outputs of the approximate expression, the number of the corresponding read cycle is not limited.
    The approximation expression is generated, for example, on the basis of the method of least squares. The approximation expression may be generated using other known approximate expression generating methods. The signal processing unit 16a may calculate a correction value of the read value D1 using the approximate expression based on the read values D1 (0) to D1 (n), and may calculate the first estimate Q1 est by subtracting the correction value of the read value D1 from the sum of the correction value Qlcorr of the first Calculate read values Q1 and the first read value Q1 (0). Both the correction value of the read value D1 and the correction value Qlcorr of the read value Q1 are respectively the correction value of the read value D1 and the correction value of the read value D1 in the read cycle in the same order. Similarly, the signal processing unit 16a may calculate a correction value of the read value D2 using an approximate expression based on the read values D2 (0) to D2 (n), and may calculate the second estimate Q2est by subtracting the correction value of the read value D2 from the sum of the second reading value correction value Q2corr Q2 and the second read value Q2 (0). Both the correction value of the read value D2 and the correction value Q2corr of the read value Q2 are each of the correction value of the read value D2 and the correction value of the read value Q2 in the read cycle in the same order.
    The first estimated value Qlest is a value obtained by subtracting the first reading value corresponding to the noise component such as background light detected at another frame period from the sum of the correction value of the first reading value calculated using the approximate expression, and of the first read value Q1 (0). The second estimated value Q2 is a value obtained by subtracting the second reading value corresponding to the noise component such as background light detected at another frame period from the sum of the correction value of the second reading value calculated using the approximation equation and the first reading value Q1 (0). is determined. Therefore, even if a range of the first read value and the second read value that are detected before the last read cycle fluctuates due to disturbance or the like, the influence of the read value including the fluctuation becomes the first estimated value Qlest and the second estimated value In Q2est reduced based on the approximation expression. The influence of noise such as backlight is reduced in the first estimate Q1est and the second estimate Q2est.
    Subsequently, the signal processing unit 16a calculates a distance (S23 in Fig. 7). Specifically, the signal processing unit 16a calculates a distance L by calculating the following expression (3). <Expression (3)> L = (1/2) X c X ΤΟ X {Q2est xa / (Qlest + Q2est xa)} Here, c is the speed of light, a is the ratio of the first read value and the second read value the same amount of incident light enters the photosensitive region during the first transfer period T1 and the second transfer period T2. In this way, the signal processing unit 16a calculates the distance to the object with high accuracy using the ratio of the first estimated value Qlest based on the accumulated charge amount of the first accumulation region fd1 and the second estimated value Q2est, based on the accumulated charge amount of the second accumulation region fd2. In the present embodiment, the signal processing unit 16a outputs a line of a distance image having a gray scale value corresponding to the distance calculated for each of the pixels. In the present embodiment, the signal processing unit 16a may repeat the control and calculation described with reference to FIGS. 7 to 9 in such a manner that the distance image is updated for each of the frame periods Tf.
    Meanwhile, as illustrated in Fig. 8, the signal processing unit 16a increases the number m of emission periods per charge transfer cycle Cy within one frame period Tf. Specifically, the signal processing unit 16a increases the number m of emission periods per charge transfer cycle Cy by reducing the cycle of the emission period. That is, the signal processing unit 16a increases the number m of emission periods per charge transfer cycle Cy by reducing the cycle of the emission period. The signal processing unit 16a lowers the number m of the emission period per charge transfer cycle Cy by increasing the cycle of the emission period.
    The cycle of the emission period at the start time of a frame period Tf is longer than the cycle of the emission period at a later time of a frame period Tf. That is, the cycle of the emission period at the later time of a frame period Tf is shorter than the cycle of the emission period Tf Start time of a frame period Tf. The cycle of the emission period monotonically decreases within a frame period Tf. In the present specification, "monotone decreasing" means that there is no intrinsic tendency, that is, monotonically lowering in a broad sense. In a frame period Tf, the length of the reading period is constant, with no change in the period of the charge transfer cycle Cy.
    The signal processing unit 16a increases in stages the number m of emission periods per charge transfer cycle Cy. For example, the number m of emission periods per charge transfer cycle Cy is "two" at the beginning term of a frame period Tf and is the number of emission periods per charge transfer cycle Cy "M" at a later time of one frame period Tf. That is, the signal processing unit 16a estimates the number of emission periods per charge transfer cycle Cy increased in two stages. It is to be noted that M is a predetermined numerical value as the maximum value of the number of emission periods per charge transfer cycle Cy.
    The number m of emission periods per charge transfer cycle Cy increases monotonously within a frame period Tf. In the present specification, "monotonically increasing" means that there is no decreasing tendency, that is, increasing monotonically in a broad sense.
    In the distance measuring apparatus 10 of the present embodiment, the cycle of the emission period is longer than the start time of a frame period Tf than at a later time of a frame period Tf, resulting in a smaller number m of emission periods per charge transfer cycle Cy. Therefore, even when the intensity of the reflected light incident on the pixel unit P (j) of the sensor 18 is high (for example, when the object is located at a short distance or the reflectance of the object is high), the saturation of the Accumulated signal charges are not to appear at the beginning term of a frame period Tf. Therefore, an appropriate distance measurement is performed in the distance measuring apparatus 10.
    In the later time of a frame period Tf, the cycle of the emission period is shorter than the start term of a frame period Tf, resulting in a larger number m of emission periods per charge transfer cycle Cy. Therefore, even if the intensity of the reflected light incident on the pixel unit P (j) of the sensor 18 is low (for example, when the object is located at a long distance or the reflectance of the object is low), a shortage of the accumulated signal charge is reduced , Therefore, an appropriate distance measurement is performed in the distance measuring apparatus 10.
    As described above, according to the distance measuring apparatus 10 of the present embodiment, it is possible to expand the dynamic range of intensity of reflected light without changing a frame period Tf.
    As illustrated in Fig. 10, the signal processing unit 16a can increase the number m of emission periods per charge transfer cycle Cy in three or more stages. In addition, as illustrated in Fig. 11, the signal
    Processing unit 16a increase the number m of emission periods per charge transfer cycle Cy gradually from "1" to "M". In any case, the number m of emission periods per charge transfer cycle Cy increases monotonously within a frame period Tf.
    As illustrated in FIG. 12, the signal processing unit 16a can increase the number m of emission periods per charge transfer cycle Cy by increasing the length of the read period and increasing the period of the charge transfer cycle Cy. That is, the signal processing unit 16a lowers the number m of emission periods per charge transfer cycle Cy by reducing the length of the read period and reducing the period of the charge transfer cycle Cy while increasing the number m of emission periods per charge transfer cycle Cy by extending the period of the charge transfer cycle Cy becomes.
    The period of the charge transfer cycle Cy at the start time of a frame period Tf is shorter than the period of the charge transfer cycle Cy at the later time of a frame period Tf. That is, the period of the charge transfer cycle Cy at the later time of a frame period Tf is longer than the period of the charge transfer cycle Cy at the start time of a frame period Tf. The period of the charge transfer cycle Cy monotonously increases within a frame period Tf. The cycle of the emission period has not changed within a frame period Tf.
    In the example illustrated in Fig. 12, the signal processing unit 16a increases the period of the charge transfer cycle Cy in two stages. For example, the number m of emission periods per charge transfer cycle Cy is "three", and is the number of emission periods per charge transfer cycle Cy "M" in the later period of a frame period Tf. The number m of emission periods per charge transfer cycle Cy increases monotonously within a frame period Tf.
    In the distance measuring apparatus 10 of the present embodiment, the period of the charge transfer cycle Cy is shorter at the start time of the one frame period Tf than at the later time of one frame period Tf, resulting in a smaller number m of emission periods per charge transfer cycle Cy. Therefore, even when the intensity of reflected light incident on the pixel unit P (j) of the sensor 18 is high (for example, when the object is located at a short distance or the reflectance of the object is high), the saturation of the accumulated one tends Signal charges do not occur at the beginning term of a frame period Tf. Therefore, an appropriate distance measurement is performed in the distance measuring apparatus 10.
    At the latter time of a frame period Tf, the period of the charge transfer cycle Cy is longer than the start time of a frame period Tf, resulting in a larger number m of emission periods per charge transfer cycle Cy. Therefore, even when the intensity of the reflected light incident on the pixel unit P (j) of the sensor 18 is low (for example, when the object is located at a long distance or the reflectance of the object is low), shortening of accumulated signal charge is suppressed. Therefore, an appropriate distance measurement is performed in the distance measuring apparatus 10.
    As illustrated in FIG. 13, the signal processing unit 16a can increase the period of the charge transfer cycle Cy in three or more stages. In this case, the number m of emission periods per charge transfer cycle Cy increases in three or more stages. Moreover, as illustrated in Fig. 14, the signal processing unit 16a may gradually increase the period of the charge transfer cycle Cy. In this case, for example, the number m of emission periods per charge transfer cycle Cy gradually increases from "one" to "M". In any case, the number m of emission periods per charge transfer cycle Cy increases monotonously within a frame period Tf.
    Next, another embodiment will be described with reference to FIGS. 15 and 16. Fig. 15 is a diagram illustrating an exemplary sensor according to the other embodiment. Fig. 16 is a circuit diagram of a pixel unit of a sensor unit according to the other embodiment and a corresponding sample and hold circuit for the pixel unit.
    The distance measuring device 10 may include a sensor 18 a illustrated in FIG. 15 instead of the sensor 18. The sensor 18a includes an imaging region IR having IxJ pixel units P (i, j). It should be noted that i is an integer of 1 to I, j is an integer of 1 to J, each of I and J being an integer of two or more. I x J pixel units P (i, j) are arranged in I rows and J columns. In the imaging region IR, two vertical signal lines V1 (j) and V2 (j) are provided for each of the columns of the pixel unit.
    As illustrated in Fig. 16, a switch SW20 is connected to the output of the charge voltage conversion circuit A1 of the pixel unit P (i, j) of the sensor 18A. The switch SW20 is connected to the switch SW10 of the corresponding first sample and hold circuit SH1 via the corresponding vertical signal line V1 (j). A switch SW22 is connected to the output of the charge voltage conversion circuit A2 of the pixel unit P (i, j). The switch SW22 is connected to the switch SW12 of the corresponding second sample and hold circuit SH2 via the corresponding vertical signal line V2 (j).
    The sensor 18A further includes a vertical shift register group VSG. The vertical shift register group VSG includes a plurality of vertical shift registers arranged in the vertical direction. Each of the vertical shift registers includes, for example, a flip-flop. A start signal is applied from the signal processing unit 16a to the vertical shift register provided at one end in an arrangement direction. One
    Clock signal is applied from the signal processing unit 16a to all the vertical shift registers. Upon receiving the start signal and the clock signal, the vertical shift register group VSG sequentially applies row selection signals to the switches SW20 and SW22 of the plurality of pixel units P (i, j) in the order of rows.
    With this configuration, the outputs of the circuit voltage conversion circuits A1 and A2 of the plurality of pixel units P (i, j) in each of the columns are sequentially connected to the corresponding vertical signal lines V1 (j) and V2 (j), then becomes Output voltage of each of the plurality of pixel units P (i, j) is sequentially held in each of the corresponding sample and hold circuits SH1 and SH2 in the order of rows. When the output voltage of each of the plurality of pixel units P (j, i) in each of the rows is held in each of respective sample and hold circuits SH1 and SH2, the voltage held in each of the sample and hold circuits SH1 and SH2 is sequentially latched with each the signal lines H1 and H2 are coupled in the order of columns by a read pulse signal applied from the horizontal shift register group HSG. Then, by performing the calculation described with reference to FIG. 7 at each of the pixel units, the signal processing unit 16a may form a two-dimensional distance image.
    Although the embodiments of the present invention have been described above, the present invention is not necessarily limited to the above-described embodiments, and various modifications can be made without departing from the spirit and scope of the present invention.
    For example, although the embodiment illustrated in Fig. 15 includes the corresponding sample and hold circuits SH1 and SH2 for each of the columns of the pixel unit, it is allowed to include the corresponding sample and hold circuits SH1 and SH2 for each of the pixel units. The number of pixel units in the imaging region IR may be one.
    The number m of emission periods per charge transfer cycle Cy is not limited to the values illustrated in Figs. 8 and 10 to 14.
    As described in Japanese Unexamined Patent Publication No. 2013-178121 and Japanese Unexamined Patent Publication No. 2013-206903 by the applicant of the present invention, each of the pixel units P (1) to P (J) may have two photosensitive regions (first photosensitive region and second photosensitive region). In this case, the first accumulation region accumulates the charge generated in the first photosensitive region, and the second accumulation region accumulates the charge generated in the second photosensitive region. The first transfer electrode is provided between the first photosensitive region and the first accumulation region. The second transfer electrode is provided between the second photosensitive region and the second accumulation region.
    The photosensitive region, the accumulation region, and the transfer electrode included in each of the pixel units P (1) to P (J) may be "one," as in Japanese Unexamined Patent Publication No. 2013-178121 and Japanese Patent Publication No. Hei Unexamined Patent Publication No. 2013-206903 described above. In this case, in the voltage signal applied to the transfer electrode, a phase shift is intermittently provided at a predetermined timing. For example, a phase shift of 180 degrees is provided at a timing of 180 degrees in the above-described voltage signal. The voltage signal applied to the transfer electrode is synchronized with the drive pulse signal SL at the time of 0 degree, and has a phase difference of 180 degrees at a timing of 180 degrees in the drive pulse signal SL. That is, the charge accumulated in the accumulation region is read at a timing of 0 degrees and a timing of 180 degrees.
    Industrial Applicability The present invention can be applied to a distance measuring device based on the TOF method.
    List of Reference Numerals [0107] Distance measuring device 12 Light source unit 14 Sensor unit 16 Processing unit 16a Signal processing unit 18 Sensor
    Cy charge transfer cycle fd1 first accumulation region fd2 second accumulation region PG photocouple electrode RS1 first reset switch RS2 second reset switch T1 first transfer period T2 second transfer period
    Tf frame period TX1 first transmission electrode TX2 second transmission electrode
    Vr reset potential
    权利要求:
    Claims (7)
    [1]
    A distance measuring device (10) configured to detect a distance to an object by a transit time method, the device comprising: a light source unit (12) configured to emit modulated light; a sensor unit (14) including: a photosensitive region configured to generate charge in accordance with incident light, a first accumulation region (fd1) configured to accumulate the charge generated in the photosensitive region, a second accumulation region (fd2) configured to accumulate the charge generated in the photosensitive region, a first transfer electrode (TX1) provided between the photosensitive region and the first accumulation region, a second transfer electrode (TX2) disposed between the photosensitive region and the second accumulation region (fd2), a first reset switch (RS1) provided between the first accumulation region (fd1) and a first terminal connected to a reset potential, and a second reset switch (RS2) interposed between the second accumulation region (fd2) second accumulation region (fd2) and a second terminal, which also ansc to the reset potential is, is provided, and; a processing unit (16) configured to calculate the distance by controlling an emission timing of the modulated light and controlling the sensor unit (14), wherein the processing unit (16) is arranged to cause the light source unit (12) to modulate the light in one or more emission periods in each charge transfer cycle of a plurality of charge transfer cycles within one frame period, which is one period from connecting the accumulation regions (fd 1, fd2) to the reset potential until the next connection of the accumulation regions (fd1, fd2) to the reset potential, by controlling the accumulation regions To reset reset switches (RS1, RS2) and to increase the number of emission periods per charge transfer cycle within one frame period, to accumulate the charge generated in the photosensitive region in the first accumulation region (fd 1) by controlling a voltage applied to the first transfer electrode (8) TX1) in one or more first transfer periods (T1) synchronized with one or more emission periods and to accumulate the charge generated in the photosensitive region in the second accumulation region (fd2) by controlling a voltage applied to the second transfer electrode (TX2) in FIG one or more second transfer periods (T2) phase-reversed with respect to one or more first transfer periods (T1), in a plurality of charge transfer cycles within one frame period from the connection of the first accumulation region (fd1) and the second accumulation region (fd2) the reset potential until the next connection of the first accumulation region (fd1) and the second accumulation region (fd2) with the reset potential, by controlling the first reset switch (RS1) and the second reset switch (RS2), from the sensor unit (14), a plurality of first read values corresponding to one in the first accumulation region (fd 1) at an alternative time, with respect to a time between the end point of the nth charge transfer cycle and the starting point of the (n + 1) th charge transfer cycle, accumulated charge amount, wherein the plurality of charge transfer cycles and a plurality of second readings of a in the second accumulation region (fd2) at the time of accumulating charge amount, in each of the plurality of read cycles corresponding to each of the plurality of charge transfer cycles, such that the accumulated charge amount corresponds to the number of charge transfer cycles, where "n" indicates the order of the plurality of read cycles, and calculate the distance based on the plurality of first read values and the plurality of second read values.
    [2]
    2. A distance measuring device according to claim 1, wherein the processing unit (16) is adapted to increase the number of emission periods per one charge transfer cycle by reducing the duration of the emission period.
    [3]
    The distance measuring apparatus according to claim 1, wherein the processing unit (16) is adapted to increase the number of emission periods per one charge transfer cycle by extending a period of the charge transfer cycle.
    [4]
    The distance measuring apparatus according to any one of claims 1 to 3, wherein the processing unit (16) is adapted to stepwise increase the number of emission periods per one charge transfer cycle.
    [5]
    A distance measuring apparatus according to any one of claims 1 to 3, wherein the processing unit (16) is adapted to gradually increase the number of emission periods per one charge transfer cycle.
    [6]
    6. A distance measuring device according to claim 1, wherein the processing unit (16) is adapted to calculate a sum of the first read value of the nth read cycle and a difference value between the first read value of the nth read cycle and the first read value of the (n-1) - to compare the read cycle with a predetermined threshold, or a sum of the second read value of the n-th read cycle and a difference value between the second read value of the n-th read cycle and the second read value of the (n-1) -th read cycle with the predetermined threshold and if any of the sums exceeds the predetermined threshold, stop the read cycle of the (n + 1) th and subsequent read cycles.
    [7]
    The distance measuring apparatus according to claim 1 or 6, wherein the processing unit (16) is adapted to estimate a first estimated value using an approximate expression based on the plurality of first read values and a second estimate using an approximate expression based on the plurality of second read values and calculate the distance based on the first estimate and the second estimate.
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    WO2016175012A1|2016-11-03|
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    JP6554310B2|2019-07-31|
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    法律状态:
    优先权:
    申请号 | 申请日 | 专利标题
    JP2015091372A|JP6554310B2|2015-04-28|2015-04-28|Distance measuring device|
    PCT/JP2016/061535|WO2016175012A1|2015-04-28|2016-04-08|Distance measurement device|
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